Field Effect Transistors
Figure 1: Comparison of JFET and transistor symbols
Figure 1: Comparison of JFET and transistor symbols
Although it has brought about a revolution in the design of electronic equipment, the bipolar (npn/pnp) transistor still has one very undesirable characteristic. The low input impedance associated with its base-emitter junction causes problems in matching impedances between interstage amplifiers. In contrast to the bipolar transistor, which uses bias current between base and emitter to control conductivity, the Field Effect Transistor (FET) uses voltage to control an electrostatic field within the transistor.
The elements of one type of FET, the junction type (JFET), are shown in figure 1. The „gate” element of the JFET corresponds very closely in operation to the base of a bipolar transistor. The „source” and „drain” elements of the JFET correspond to the emitter and collector of the transistor.
Silicon bar
p- type
material
Figure 2: JFET structure
Silicon bar
p- type
material
Figure 2: JFET structure
The construction of a JFET is shown in figure 2. A solid bar, made either of n- type or p- type material, forms the main body of the device. Diffused into each side of this bar are two deposits of material of the opposite type from the bar material, which form the „gate”. The portion of the bar between the deposits of gate material is of a smaller cross-section than the rest of the bar and forms a „channel” connecting the source and the drain. Figure 2 shows a bar of n- type material and a gate of p- type material. Because the material in the channel is n- type, the device is called an N-channel JFET.
In a P-channel JFET, the channel is made of p- type material and the gate of n- type material. Like the bipolar transistor types, the two types of JFET differ only in the configuration of bias voltages required and in the direction of the arrow within the symbol. Just as it does in bipolar transistor symbols, the arrow in a JFET symbol always points towards the n- type material. Thus the symbol of the N-channel JFET shows the arrow pointing toward the drain/source channel, whereas the P-channel symbol shows the arrow pointing away from the drain/source channel toward the gate.
FET operation
The key to FET operation is the effective cross-sectional area of the channel, which can be controlled by variations in the voltage applied to the gate. This is demonstrated in the figures which follow.
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Figure 3: JFET operation with zero gate bias
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Figure 4: JFET with reverse bias
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Figure 3: JFET operation with zero gate bias
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Figure 4: JFET with reverse bias
Figure 3 shows how the JFET operates in a zero gate bias condition. Five volts are applied across the JFET so that current flows through the bar from source to drain. The gate terminal is tied to ground. This is a zero gate bias condition. In this condition, a typical bar represents a resistance of about 500 ohms. A milliamperemeter, connected in series with the drain lead and dc power, indicates the amount of current flow. With a drain supply (VDD) of 5 volts, the milliamperemeter gives a drain current (ID) reading of 10 milliamperes. The voltage and current subscript letters (VDD, ID) used for an FET correspond to the elements of the FET just as they do for the elements of transistors.
In figure 4, a small reverse-bias voltage is applied to the gate of the JFET. A gate-source voltage (VGG) of negative 1 volt applied to the p- type gate material causes the junction between the p- and n- type material to become reverse biased. Just as it did in the varactor diode, a reverse-bias condition causes a „depletion region” to form around the pn junction of the JFET. Because this region has a reduced number of current carriers, the effect of reverse biasing is to reduce the effective cross-sectional area of the „channel”. This reduction in area increases the source-to-drain resistance of the device and decreases current flow.
The application of a large enough negative voltage to the gate will cause the depletion region to become so large that conduction of current through the bar stops altogether. The voltage required to reduce drain current (ID) to zero is called „pinch-off” voltage and is comparable to „cut-off” voltage in a vacuum tube. In figure 4, the negative 1 volt applied, although not large enough to completely stop conduction, has caused the drain current to decrease markedly (from 10 milliamperes under zero gate bias conditions to 5 milliamperes). Calculation shows that the 1-volt gate bias has also increased the resistance of the JFET (from 500 ohms to 1 kilohm). In other words, a 1-volt change in gate voltage has doubled the resistance of the device and cut current flow in half.
These measurements, however, show only that a JFET operates in a manner similar to a bipolar transistor, even though the two are constructed differently. As stated before, the main advantage of an FET is that its input impedance is significantly higher than that of a bipolar transistor. The higher input impedance of the JFET under reverse gate bias conditions can be seen by connecting a microammeter in series with the gate-source voltage (VGG). With a VGG of 1 volt, the microammeter reads 0.5 microamps. Applying Ohm's law (1V / 0.5µA) illustrates that this very small amount of current flow results in a very high input impedance (about 2 megohms). By contrast, a bipolar transistor in similar circumstances would require higher current flow (e.g., 0.1 to -1 mA), resulting in a much lower input impedance (about 1000 ohms or less). The higher input impedance of the JFET is possible because of the way reverse-bias gate voltage affects the cross-sectional area of the channel.
The preceding example of JFET operation uses an N-channel JFET. However, a P-channel JFET operates on identical principles. Because the materials used to make the bar and the gate are reversed, source voltage potentials must also be reversed. The P-channel JFET therefore requires a positive gate voltage to be reverse biased, and current flows through it from drain to source.
JFET Application
Figure 5: JFET common source amplifier
Figure 5: JFET common source amplifier
Figure 5 shows a basic common-source amplifier circuit containing an N-channel JFET. The characteristics of this circuit include high input impedance and a high voltage gain. The function of the circuit components in this figure is very similar to those in a triode vacuum tube common-cathode amplifier circuit. C1 and C3 are the input and output coupling capacitors. R1 is the gate return resistor. It makes the gate negative with respect to the source. It prevents unwanted charge buildup on the gate by providing a discharge path for C1 furthermore. R2 and C2 provide source self-bias for the JFET. The voltage drop across R2 makes the source positiver than the ground level. C2 avoids a negative feedback effect of R2. R3 is the drain load resistor, which acts like the collector load resistor.
The phase shift of 180 degrees between input and output signals is the same as that of common-emitter transistor circuits. The reason for the phase shift can be seen easily by observing the operation of the N-channel JFET. On the positive alternation of the input signal, the amount of reverse bias on the p- type gate material is reduced, thus increasing the effective cross-sectional area of the channel and decreasing source-to-drain resistance. When resistance decreases, current flow through the JFET increases. This increase causes the voltage drop across R3 to increase, which in turn causes the drain voltage to decrease. On the negative alternation of the cycle, the amount of reverse bias on the gate of the JFET is increased and the action of the circuit is reversed. The result is an output signal, which is an amplified 180-degree-out-of-phase version of the input signal.
Figure 6: JFET amplifiers phase shift